[Scilab-users] Hybrid simulation in Scilab/Xcos

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Steve Steve
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[Scilab-users] Hybrid simulation in Scilab/Xcos

Hello,

I have been facing a problem how to develop a hybrid simulation in the
Scilab/Xcos. The simulation consists of  a SISO (single input single output)
system in continuous time domain and a discrete PID controller. The PID
controller is a CBLOCK containing the code in the C programmin language.
Interface between the "analog world" and the "discrete world" consists of
two SAMPLEHOLD blocks. My problem is that I don't know how to achieve a
state when the CBLOCK is calculated in synchronism with the sample and hold
process realized in the SAMPLEHOLD blocks. Can anybody give me an advice or
recommend me some tutorial? Thanks in advance.



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Tan Chin Luh Tan Chin Luh
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Re: Hybrid simulation in Scilab/Xcos

Hi, 

you might want to use the discrete block "DLR" instead. 

first you could convert the PID in s-domain into z domain using the dscr function in the Scilab, and then use the value in DLR block for hybrid simulation. make sure the clock u use for the block is same as the sampling rate in the dscr function. 

hope this helps.

rgds,
CL


---- On Mon, 14 Sep 2020 22:13:05 +0800 Steve <[hidden email]> wrote ----

Hello,

I have been facing a problem how to develop a hybrid simulation in the
Scilab/Xcos. The simulation consists of a SISO (single input single output)
system in continuous time domain and a discrete PID controller. The PID
controller is a CBLOCK containing the code in the C programmin language.
Interface between the "analog world" and the "discrete world" consists of
two SAMPLEHOLD blocks. My problem is that I don't know how to achieve a
state when the CBLOCK is calculated in synchronism with the sample and hold
process realized in the SAMPLEHOLD blocks. Can anybody give me an advice or
recommend me some tutorial? Thanks in advance.



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Steve Steve
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Re: Hybrid simulation in Scilab/Xcos

Hello Tan Chin Luh,

thank you for your reaction. My problem is not in the discretization process
itself. I have the difference equation of the PID controller. So I have
attempted to develop the simulation and I have hit a problem which I have
attempted to describe in another question (please see the link:
http://mailinglists.scilab.org/Scilab-users-PID-controller-simulation-in-Scilab-Xcos-td4041014.html.).
I have found that the problem mentioned in the link vanishes in case I use
one clock source for whole simulation (the only one used clock source is the
one which controls the S/H blocks). Do you have any idea why this behavior
occurs? (I think that it could be caused by the aliasing phenomenon). Do you
think that the simulation mentioned in the link (with one clock source) is
correct?



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